BS EN 61188-7:2017
$142.49
Printed boards and printed board assemblies. Design and use – Electronic component zero orientation for CAD library construction
Published By | Publication Date | Number of Pages |
BSI | 2017 | 28 |
This part of IEC 61188 establishes a consistent technique for the description of electronic component orientation, and their land pattern geometries. This facilitates and encourages a common data capture and transfer methodology amongst and between global trading partners.
PDF Catalog
PDF Pages | PDF Title |
---|---|
2 | undefined |
7 | CONTENTS |
8 | FOREWORD |
10 | INTRODUCTION |
11 | 1 Scope 2 Normative references 3 Terms and definitions 4 Basic rules 4.1 Common rules 4.2 General basic rules |
12 | 4.3 Level A basic rule 4.4 Level B basic rule 4.5 File description definition |
13 | 4.6 Component orientations Figures Figure 1 – Example of level A orientation concepts |
14 | Tables Table 1 – Discrete component land pattern conventions |
15 | Table 2 – Diode and transistor land pattern conventions |
16 | Table 3 – Transistor and IC land pattern conventions |
17 | Table 4 – Integrated circuit packages land pattern conventions |
19 | Table 5 – Integrated circuit packages land pattern conventions |
20 | Table 6 – BGA land pattern conventions |
21 | Table 7 – Resistor array and connector land pattern conventions |
22 | Table 8 – Level A land pattern convention summary |
23 | 5 Origin point of land pattern 5.1 General 5.2 Surface mount components Table 9 – Level B land pattern convention summary |
24 | 5.3 Through-hole leaded components 6 Land pattern to footprint comparison Figure 2 – Connector and switch library symbol examples Figure 3 – Through-hole components with terminal point of origin orientation |
25 | 7 Components with one terminal 7.1 Surface mount components 7.2 Through-hole leaded components Figure 4 – Circular or square one-terminal component Figure 5 – Rectangular or oval one-terminal component Figure 6 – Surface mount components with one lead offset |