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BS EN 62680-1-2:2017

$215.11

Universal serial bus interfaces for data and power – Common components. USB Power Delivery specification

Published By Publication Date Number of Pages
BSI 2017 502
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IEC 62680-1-2:2017(E) defines a power delivery system covering all elements of a USB system including: Hosts, Devices, Hubs, Chargers and cable assemblies.  This specification describes the architecture, protocols, power supply behavior, connectors and cabling necessary for managing power delivery over USB at up to 100 W. This specification is intended to be fully compatible and extend the existing USB infrastructure.  It is intended that this specification will allow system OEMs, power supply and peripheral developers adequate flexibility for product versatility and market differentiation without losing backwards compatibility. USB Power Delivery is designed to operate independently of the existing USB bus defined mechanisms used to negotiate power which are: – [USB 2.0], [USB 3.1]in band requests for high power interfaces. – [USBBC 1.2]mechanisms for supplying higher power (not mandated by this specification). – [USB Type-C 1.2]mechanisms for supplying higher power

PDF Catalog

PDF Pages PDF Title
5 FOREWORD
7 INTRODUCTION
9 Contributors
15 Revision History
16 Table of Contents
32 1 Introduction
1.1 Overview
33 to a powered cable.
1.3 Scope
34 1.4 Conventions
1.4.1 Precedence
1.4.2 Keywords
35 1.4.3 Numbering
1.5 Related Documents
36 1.6 Terms and Abbreviations
Tables
Table 1-1 โ€“ Terms and Abbreviations
42 1.7 Parameter Values
2 Overview
2.1 Introduction
43 2.2 Section Overview
44 2.3 USB Power Delivery Capable Devices
Figures
Figure 2-1 โ€“ Logical Structure of USB Power Delivery Capable Devices
45 2.4 SOP* Communication
2.4.1 Introduction
2.4.2 SOP* Collision Avoidance
46 2.4.3 SOP Communication
2.4.4 SOPโ€™/SOPโ€™โ€™ Communication with Cable Plugs
47 2.5 Operational Overview
2.5.1 Source Operation
Figure 2-2 โ€“ Example SOPโ€™ Communicationbetween VCONN Source and Cable Plug(s)
49 2.5.2 Sink Operation
51 2.5.3 Cable Plugs
52 2.6 Architectural Overview
Figure 2-3 โ€“ USB Power Delivery Communications Stack
53 Figure 2-4 โ€“ USB Power Delivery Communication Over USB
54 2.6.1 Policy
Figure 2-5 โ€“ High Level Architecture View
55 2.6.2 Message Formation and Transmission
2.6.3 Collision Avoidance
56 2.6.4 Power supply
2.6.5 DFP/UFP
57 2.6.6 VCONN Source
2.6.7 Cable and Connectors
2.6.8 Interactions between Non-PD, BC and PD devices
2.6.9 Power Rules
3 USB Type-A and USB Type-B Cable Assemblies and Connectors
4 Electrical Requirements
4.1 Interoperability with other USB Specifications
58 4.2 Dead Battery Detection / Unpowered Port Detection
4.3 Cable IR Ground Drop (IR Drop)
4.4 Cable Type Detection
5 Physical Layer
5.1 Physical Layer Overview
59 5.2 Physical Layer Functions
5.3 Symbol Encoding
60 5.4 Ordered Sets
Table 5-1 โ€“ 4b5b Symbol Encoding Table
61 Figure 5-1 โ€“ Interpretation of ordered sets
Table 5-2 โ€“ Ordered Sets
Table 5-3 โ€“ Validation of Ordered Sets
62 5.5 Transmitted Bit Ordering
5.6 Packet Format
Figure 5-2 โ€“ Transmit Order for Various Sizes of Data
Table 5-4 โ€“ Data Size
63 5.6.1 Packet Framing
Figure 5-3 โ€“ USB Power Delivery Packet Format
Table 5-5 โ€“ SOP ordered set
64 Table 5-6 โ€“ SOPโ€™ ordered set
Table 5-7 โ€“ SOPโ€™โ€™ ordered set
65 5.6.2 CRC
Table 5-8 โ€“ SOPโ€™_Debug ordered set
Table 5-9 โ€“ SOPโ€™โ€™_Debug ordered set
66 Figure 5-4 โ€“ CRC 32 generation
67 5.6.3 Packet Detection Errors
Table 5-10 โ€“ CRC-32 Mapping
68 5.6.4 Hard Reset
5.6.5 Cable Reset
Figure 5-5 โ€“ Line format of Hard Reset
Table 5-11 โ€“ Hard Reset ordered set
69 5.7 Collision Avoidance
Figure 5-6 โ€“ Line format of Cable Reset
Table 5-12 โ€“ Cable Reset ordered set
70 5.8 Biphase Mark Coding (BMC) Signaling Scheme
5.8.1 Encoding and signaling
Figure 5-7 โ€“ BMC Example
Table 5-13 โ€“ Rp values used for Collision Avoidance
71 Figure 5-8 โ€“ BMC Transmitter Block Diagram
Figure 5-9 โ€“ BMC Receiver Block Diagram
72 Figure 5-10 โ€“ BMC Encoded Start of Preamble
Figure 5-11 โ€“ Transmitting or Receiving BMC Encoded FrameTerminated by Zero with High-to-Low Last Transition
73 Figure 5-12 โ€“ Transmitting or Receiving BMC Encoded FrameTerminated by One with High-to-Low Last Transition
Figure 5-13 โ€“ Transmitting or Receiving BMC Encoded FrameTerminated by Zero with Low to High Last Transition
74 5.8.2 Transmit and Receive Masks
Figure 5-14 โ€“ Transmitting or Receiving BMC Encoded Fr
Figure 5-15 โ€“ Waiting for idle after a BMC Encoded FrameTerminated by Zero with High-to-Low Last Transition
75 Figure 5-16 โ€“ BMC Tx โ€˜ONEโ€™ Mask
Figure 5-17 โ€“ BMC Tx โ€˜ZEROโ€™ Mask
76 Table 5-14 โ€“ BMC Tx Mask Definition, X Values
Table 5-15 โ€“ BMC Tx Mask Definition, Y Values
78 Figure 5-18 โ€“ BMC Rx โ€˜ONEโ€™ Mask when Sourcing Power
Figure 5-19 โ€“ BMC Rx โ€˜ZEROโ€™ Mask when Sourcing Power
79 Figure 5-20 โ€“ BMC Rx โ€˜ONEโ€™ Mask when Power neutral
Figure 5-21 โ€“ BMC Rx โ€˜ZEROโ€™ Mask when Power neutral
80 Figure 5-22 โ€“ BMC Rx โ€˜ONEโ€™ Mask when Sinking Power
Figure 5-23 โ€“ BMC Rx โ€˜ZEROโ€™ Mask when Sinking Power
81 5.8.3 Transmitter Load Model
Figure 5-24 โ€“ Transmitter Load Model for BMC Tx from a Source
Table 5-16 โ€“ BMC Rx Mask Definition
82 5.8.4 BMC Common specifications
Figure 5-25 Transmitter Load Model for BMC Tx from a Sink
83 5.8.5 BMC Transmitter Specifications
Table 5-17 โ€“ BMC Common Normative Requirements
84 Table 5-18 โ€“ BMC Transmitter Normative Requirements
85 Figure 5-26 โ€“ Transmitter diagram illustrating zDriver
86 Figure 5-27 โ€“ Inter-Frame Gap Timings
87 5.8.6 BMC Receiver Specifications
Table 5-19 โ€“ BMC Receiver Normative Requirements
88 Figure 5-28 โ€“ Example Multi-Drop Configuration showing two DRPs
Figure 5-29 โ€“ Example Multi-Drop Configuration showing a DFP and UFP
89 5.9 Built in Self-Test (BIST)
5.9.1 BIST Carrier Mode
5.9.2 BIST Test Data
90 6 Protocol Layer
6.1 Overview
6.2 Messages
Figure 5-30 โ€“ Test Data Frame
91 6.2.1 Message Construction
Figure 6-1 โ€“ USB Power Delivery Packet Formatincluding Control Message Payload
Figure 6-2 โ€“ USB Power Delivery Packet Format including Data Message Payload
Figure 6-3 โ€“ USB Power Delivery Packet Format includingan Extended Message Header and Payload
92 Table 6-1 โ€“ Message Header
94 Table 6-2 โ€“ Revision Interoperability
95 Table 6-3 โ€“ Extended Message Header
96 Figure 6-4 โ€“ Example Security_Request sequence Unchunked
97 6.3 Control Message
Figure 6-5 โ€“ Example Security_Request sequence Chunked
98 6.3.1 GoodCRC Message
Table 6-4 โ€“ Control Message Types
99 6.3.2 GotoMin Message
6.3.3 Accept Message
6.3.4 Reject Message
100 6.3.5 Ping Message
6.3.6 PS_RDY Message
6.3.7 Get_Source_Cap Message
6.3.8 Get_Sink_Cap Message
6.3.9 DR_Swap Message
101 6.3.10 PR_Swap Message
102 6.3.11 VCONN_Swap Message
6.3.12 Wait Message
103 6.3.13 Soft Reset Message
6.3.14 Not_Supported Message
104 6.3.15 Get_Source_Cap_Extended Message
6.3.16 Get_ Source_Status Message
6.3.17 FR_Swap Message
105 6.4 Data Message
6.4.1 Capabilities Message
Table 6-5 โ€“ Data Message Types
106 Figure 6-6 โ€“ Example Capabilities Message with 2 Power Data Objects
Table 6-6 โ€“ Power Data Object
109 Table 6-7 โ€“ Fixed Supply PDO โ€“ Source
111 ยฉ USB-IF:2016
Table 6-9 โ€“ Variable Supply (non-Battery) PDO โ€“ Source
112 Table 6-10 โ€“ Battery Supply PDO โ€“ Source
113 Table 6-11 โ€“ Fixed Supply PDO โ€“ Sink
114 Table 6-12 โ€“ Variable Supply (non-Battery) PDO โ€“ Sink
Table 6-13 โ€“ Battery Supply PDO โ€“ Sink
115 6.4.2 Request Message
Table 6-14 โ€“Fixed and Variable Request Data Object
Table 6-15 โ€“ Fixed and Variable Request Data Object with GiveBack Support
116 Table 6-16 โ€“ Battery Request Data Object
Table 6-17 โ€“ Battery Request Data Object with GiveBack Support
119 6.4.3 BIST Message
Figure 6-7 โ€“ BIST Message
120 6.4.4 Vendor Defined Message
Table 6-18 โ€“ BIST Data Object
121 Figure 6-8 โ€“ Vendor Defined Message
122 Table 6-19 โ€“ Unstructured VDM Header
123 Table 6-20 โ€“ Structured VDM Header
Table 6-21 โ€“ Structured VDM Commands
124 Table 6-22 โ€“ SVID Values
126 Table 6-23 โ€“ Commands and Responses
127 Figure 6-9 โ€“ Discover Identity Command response
Table 6-24 โ€“ ID Header VDO
128 Table 6-25 โ€“ Product Types (UFP)
Table 6-26 โ€“ Product Types (Cable Plug)
129 Table 6-27 โ€“ Product Types (DFP)
Table 6-28 โ€“ Cert Stat VDO
Table 6-29 โ€“ Product VDO
130 Table 6-30 โ€“ Passive Cable VDO
132 Table 6-31 โ€“ Active Cable VDO
134 Table 6-32 โ€“ AMA VDO
135 Figure 6-10 โ€“ Example Discover SVIDs response with 3 SVIDs
Table 6-33 โ€“ Discover SVIDs Responder VDO
136 Figure 6-11 โ€“ Example Discover SVIDs response with 4 SVIDs
Figure 6-12 โ€“ Example Discover SVIDs response with 12 SVIDsfollowed by an empty response
Figure 6-13 โ€“ Example Discover Modes response for a given SVID with 3 Mode
138 Figure 6-15 โ€“ Enter Mode sequence Interrupted by Source Capabilities and then Re-run
139 Figure 6-16 โ€“ Unsuccessful Enter Mode sequence due to NAK
140 Figure 6-17 โ€“ Exit Mode sequence
Figure 6-18 โ€“ Attention Command request/response sequence
141 Figure 6-19 โ€“ Command request/response sequence
143 Figure 6-20 โ€“ Enter/Exit Mode Process
144 6.4.5 Battery_Status Message
Figure 6-21 โ€“ Battery_Status Message
Table 6-34 โ€“ Battery Status Data Object (BSDO)
145 6.4.6 Source_Alert Message
Figure 6-22 โ€“ Source_Alert Message
Table 6-35 โ€“ Source Alert Data Object
147 6.5 Extended Message
6.5.1 Source_Capabilities_Extended Message
Figure 6-23 โ€“ Source_Capabilites_Extended Message
Table 6-36 โ€“ Extended Message Types
148 Table 6-37 โ€“ Source Capabilities Extended Data Block (SCEDB)
151 6.5.2 Source_Status Message
Figure 6-24 Source_Status Message
152 Table 6-38 โ€“ Source Status Data Block (SSDB)
153 6.5.4 Get_Battery_Status Message
Figure 6-25 โ€“ Get_Battery_Cap Message
Figure 6-26 โ€“ Get_Battery_Status Message
Table 6-39 โ€“ Get Battery Cap Data Block (GBCDB)
Table 6-40 โ€“ Get Battery Status Data Block (GBSDB)
154 6.5.5 Battery_Capabilities Message
Figure 6-27 โ€“ Battery_Capabilities Message
Table 6-41 โ€“ Battery Capability Data Block (BCDB)
155 6.5.6 Get_Manufacturer_Info Message
6.5.7 Manufacturer_Info Message
Figure 6-28 โ€“ Get_Manufacturer_Info Message
Figure 6-29 โ€“ Manufacturer_Info Message
Table 6-42 โ€“ Get Serial Number Data Block (GSNDB)
156 6.5.8 Security Messages
Table 6-43 โ€“ Manufacturer Info Data Block (MIDB)
157 6.6 Timers
6.6.1 CRCReceiveTimer
6.6.2 SenderResponseTimer
Figure 6-30 โ€“ Security_Request Message
Figure 6-31 โ€“ Security_Response Message
158 6.6.3 Capability Timers
6.6.4 SinkRequestTimer
159 6.6.5 Power Supply Timers
160 6.6.6 NoResponseTimer
161 6.6.7 BIST Timers
6.6.8 Power Role Swap Timers
162 6.6.9 Hard Reset Timers
6.6.10 Structured VDM Timers
164 6.6.11 VCONN Timers
6.6.12 tCableMessage
6.6.13 DiscoverIdentityTimer
6.6.14 Collision Avoidance Timers
165 6.6.15 tFRSwapInit
6.6.16 Time Values and Timers
166 Table 6-44 โ€“ Time Values
167 6.7 Counters
6.7.1 MessageID Counter
Table 6-45 โ€“ Timers
168 6.7.2 Retry Counter
6.7.3 Hard Reset Counter
6.7.4 Capabilities Counter
169 6.7.5 Discover Identity Counter
6.7.6 VDMBusyCounter
6.7.7 Counter Values and Counters
6.8 Reset
6.8.1 Soft Reset and Protocol Error
Table 6-46 โ€“ Counter parameters
Table 6-47 โ€“ Counters
170 6.8.2 Hard Reset
171 6.8.3 Cable Reset
6.9 Collision Avoidance
172 6.10 Message Discarding
6.11 State behavior
6.11.1 Introduction to state diagrams used in Chapter 6
Figure 6-32 โ€“ Outline of States
Table 6-48 โ€“ Message discarding
173 6.11.2 State Operation
Figure 6-33 โ€“ References to states
174 Figure 6-34 โ€“ Common Protocol Layer Message transmission State Diagram
177 Figure 6-35 โ€“ Source Protocol Layer Message transmission State Diagram
179 Figure 6-36 โ€“ Sink Protocol Layer Message transmission State Diagram
180 Figure 6-37 โ€“ Protocol layer Message reception
182 Figure 6-38 โ€“ Hard/Cable Reset
184 6.11.3 List of Protocol Layer States
185 6.12 Message Applicability
Table 6-49 โ€“ Protocol Layer States
186 6.12.1 Applicability of Control Messages
187 Table 6-50 โ€“ Applicability of Control Messages
188 6.12.2 Applicability of Data Messages
6.12.3 Applicability of Extended Messages
Table 6-51 โ€“ Applicability of Data Messages
189 6.12.4 Applicability of VDM Commands
Table 6-52 โ€“ Applicability of Extended Messages
190 6.12.5 Applicability of Reset Signaling
6.12.6 Applicability of Fast Role Swap signal
Table 6-53 โ€“ Applicability of VDM Commands
Table 6-54 โ€“ Applicability of Reset Signaling
191 6.13 Value Parameters
7 Power Supply
7.1 Source Requirements
7.1.1 Behavioral Aspects
7.1.2 Source Bulk Capacitance
Table 6-55 โ€“ Applicability of Fast Role Swap signal
Table 6-56 โ€“ Value Parameters
192 7.1.3 Types of Sources
7.1.4 Positive Voltage Transitions
Figure 7-1 โ€“ Placement of Source Bulk Capacitance
193 7.1.5 Negative Voltage Transitions
Figure 7-2 โ€“ Transition Envelope for Positive Voltage Transitions
194 7.1.6 Response to Hard Resets
Figure 7-3 โ€“ Transition Envelope for Negative Voltage Transitions
195 7.1.7 Changing the Output Power Capability
7.1.8 Robust Source Operation
Figure 7-4 โ€“ Source VBUS Response to Hard Reset
196 7.1.9 Output Voltage Tolerance and Range
197 7.1.10 Charging and Discharging the Bulk Capacitance on VBUS
7.1.11 Swap Standby for Sources
Figure 7-5 โ€“ Application of vSrcNew and vSrcValid limits after tSrcReady
198 7.1.12 Source Peak Current Operation
7.1.13 Source Capabilities Extended Parameters
Figure 7-6 โ€“ Source Peak Current Overload
199 Figure 7-7 โ€“ Holdup Time Measurement
200 7.1.14 Fast Role Swap
201 7.2 Sink Requirements
7.2.1 Behavioral Aspects
7.2.2 Sink Bulk Capacitance
Figure 7-8 โ€“ VBUS Power during Fast Role Swap
202 7.2.3 Sink Standby
7.2.4 Suspend Power Consumption
7.2.5 Zero Negotiated Current
7.2.6 Transient Load Behavior
Figure 7-9 โ€“ Placement of Sink Bulk Capacitance
203 7.2.7 Swap Standby for Sinks
7.2.8 Sink Peak Current Operation
7.2.9 Robust Sink Operation
204 7.2.10 Fast Role Swap
205 7.3 Transitions
206 7.3.1 Increasing the Current
Figure 7-10 โ€“ Transition Diagram for Increasing the Current
207 7.3.2 Increasing the Voltage
Table 7-1 โ€“ Sequence Description for Increasing the Current
208 Figure 7-11 โ€“ Transition Diagram for Increasing the Voltage
209 7.3.3 Increasing the Voltage and Current
Table 7-2 โ€“ Sequence Description for Increasing the Voltage
210 Figure 7-12 โ€“ Transition Diagram for Increasing the Voltage and Current
211 7.3.4 Increasing the Voltage and Decreasing the Current
Table 7-3 โ€“ Sequence Diagram for Increasing the Voltage and Current
212 Figure 7-13 โ€“ Transition Diagram for Increasing the Voltage and Decreasing the Current
213 7.3.5 Decreasing the Voltage and Increasing the Current
Table 7-4 โ€“ Sequence Description for Increasing the Voltage and Decreasing the Current
214 Figure 7-14 โ€“ Transition Diagram for Decreasing the Voltage and Increasing the Current
215 7.3.6 Decreasing the Current
Table 7-5 โ€“ Sequence Description for Decreasing the Voltage and Increasing the Current
216 Figure 7-15 โ€“ Transition Diagram for Decreasing the Current
217 7.3.7 Decreasing the Voltage
Table 7-6 โ€“ Sequence Description for Decreasing the Current
218 Figure 7-16 โ€“ Transition Diagram for Decreasing the Voltage
219 7.3.8 Decreasing the Voltage and the Current
Table 7-7 โ€“ Sequence Description for Decreasing the Voltage
220 Figure 7-17 โ€“ Transition Diagram for Decreasing the Voltage and the Current
221 7.3.9 Sink Requested Power Role Swap
Table 7-8 โ€“ Sequence Description for Decreasing the Voltage and the Current
222 Figure 7-18 โ€“ Transition Diagram for a Sink Requested Power Role Swap
223 Table 7-9 โ€“ Sequence Description for a Sink Requested Power Role Swap
224 7.3.10 Source Requested Power Role Swap
Figure 7-19 โ€“ Transition Diagram for a Source Requested Power Role Swap
225 Table 7-10 โ€“ Sequence Description for a Source Requested Power Role Swap
226 7.3.11 GotoMin Current Decrease
Figure 7-20 โ€“ Transition Diagram for a GotoMin Current Decrease
227 7.3.12 Source Initiated Hard Reset
Table 7-11 โ€“ Sequence Description for a GotoMin Current Decrease
228 7.3.13 Sink Initiated Hard Reset
Figure 7-21 โ€“ Transition Diagram for a Source Initiated Hard Reset
Table 7-12 โ€“ Sequence Description for a Source Initiated Hard Reset
229 7.3.14 No change in Current or Voltage
Figure 7-22 โ€“ Transition Diagram for a Sink Initiated Hard Reset
Table 7-13 โ€“ Sequence Description for a Sink Initiated Hard Reset
230 7.3.15 Fast Role Swap
Figure 7-23 โ€“ Transition Diagram for no change in Current or Voltage
Table 7-14 โ€“ Sequence Description for no change in Current or Voltage
231 Figure 7-24 โ€“ Transition Diagram for Fast Role Swap
232 7.4 Electrical Parameters
7.4.1 Source Electrical Parameters
Table 7-15 โ€“ Sequence Description for Fast Role Swap
233 Table 7-16 โ€“ Source Electrical Parameters
234 7.4.2 Sink Electrical Parameters
235 Table 7-17 โ€“ Sink Electrical Parameters
236 7.4.3 Common Electrical Parameters
8 Device Policy
8.1 Overview
8.2 Device Policy Manager
Table 7-18 โ€“ Common Source/Sink Electrical Parameters
237 8.2.1 Capabilities
238 8.2.2 System Policy
8.2.3 Control of Source/Sink
8.2.4 Cable Detection
239 8.2.5 Managing Power Requirements
241 8.2.6 Use of โ€œExternally Poweredโ€ bit with Batteries and AC supplies
242 8.2.7 Interface to the Policy Engine
Figure 8-1 โ€“ Example of daisy chained displays
243 8.3 Policy Engine
8.3.1 Introduction
8.3.2 Atomic Message Sequence Diagrams
244 Figure 8-2 โ€“ Basic Message Exchange (Successful)
245 Figure 8-3 โ€“ Basic Message flow indicating possible errors
Table 8-1 โ€“ Basic Message Flow
246 Table 8-2 โ€“ Potential issues in Basic Message Flow
247 Figure 8-4 โ€“ Basic Message Flow with Bad CRC followed by a Retry
248 Table 8-3 โ€“ Basic Message Flow with CRC failure
249 Table 8-4 โ€“ Interruptible and Non-interruptible AMS
250 Figure 8-5 โ€“ Successful Power Negotiation
251 Table 8-5 โ€“ Steps for a successful Power Negotiation
253 Figure 8-6 โ€“ Successful GotoMin operation
254 Table 8-6 โ€“ Steps for a GotoMin Negotiation
255 Figure 8-7 โ€“ Soft Reset
256 Table 8-7 โ€“ Steps for a Soft Reset
257 Figure 8-8 โ€“ Source initiated Hard Reset
258 Table 8-8 โ€“ Steps for Source initiated Hard Reset
260 Figure 8-9 โ€“ Sink Initiated Hard Reset
261 Table 8-9 โ€“ Steps for Sink initiated Hard Reset
263 Figure 8-10 โ€“ Source initiated reset โ€“ Sink long reset
264 Table 8-10 โ€“ Steps for Source initiated Hard Reset โ€“ Sink long reset
266 Figure 8-11 โ€“ Successful Power Role Swap Sequence Initiated by the Source
267 Table 8-11 โ€“ Steps for a Successful Source Initiated Power Role Swap Sequence
270 Figure 8-12 โ€“ Successful Power Role Swap Sequence Initiated by the Sink
271 Table 8-12 โ€“ Steps for a Successful Sink Initiated Power Role Swap Sequence
274 Figure 8-13 โ€“ Successful Fast Role Swap Sequence
275 Table 8-13 โ€“ Steps for a Successful Fast Role Swap Sequence
278 Figure 8-14 โ€“ Data Role Swap, UFP operating as Sink initiates
279 Table 8-14 โ€“ Steps for Data Role Swap, UFP operating as Sink initiates
280 Figure 8-15 โ€“ Data Role Swap, UFP operating as Source initiates
281 Table 8-15 โ€“ Steps for Data Role Swap, UFP operating as Source initiates
282 Figure 8-16 โ€“ Data Role Swap, DFP operating as Source initiates
283 Table 8-16 โ€“ Steps for Data Role Swap, DFP operating as Source initiates
284 Figure 8-17 โ€“ Data Role Swap, DFP operating as Sink initiates
285 Table 8-17 โ€“ Steps for Data Role Swap, DFP operating as Sink initiates
286 Figure 8-18 โ€“ Source to Sink VCONN Source Swap
287 Table 8-18 โ€“ Steps for Source to Sink VCONN Source Swap
289 Figure 8-19 โ€“ Sink to Source VCONN Source Swap
290 Table 8-19 โ€“ Steps for Sink to Source VCONN Source Swap
292 Figure 8-20 โ€“ Source Alert to Sink
Table 8-20 โ€“ Steps for Source Alert to Sink
293 Figure 8-21 โ€“ Sink Gets Source Status
294 Table 8-21 โ€“ Steps for a Sink getting Source status Sequence
295 Figure 8-22 โ€“ Sink Gets Sourceโ€™s Capabilities
296 Table 8-22 โ€“ Steps for a Sink getting Source capabilities Sequence
297 Figure 8-23 โ€“ Dual-Role Source Gets Dual-Role Sinkโ€™s Capabilities as a Source
298 Table 8-23 โ€“ Steps for a Dual-Role Source gettingDual-Role Sinkโ€™s capabilities as a Source Sequence
299 Figure 8-24 โ€“ Source Gets Sinkโ€™s Capabilities
300 Table 8-24 โ€“ Steps for a Source getting Sink capabilities Sequence
301 Figure 8-25 โ€“ Dual-Role Sink Gets Dual-Role Sourceโ€™s Capabilities as a Sink
302 Table 8-25 โ€“ Steps for a Dual-Role Sink gettingDual-Role Source capabilities as a Sink Sequence
303 Figure 8-26 โ€“ Sink Gets Sourceโ€™s Extended Capabilities
304 Table 8-26 โ€“ Steps for a Sink getting Source extended capabilities Sequence
305 Figure 8-27 โ€“ Dual-Role Source Gets Dual-Role Sinkโ€™s Extended Capabilities
306 Table 8-27 โ€“ Steps for a Dual-Role Source gettingDual-Role Sink extended capabilities Sequence
307 Figure 8-28 โ€“ Sink Gets Sourceโ€™s Battery Capabilities
308 Table 8-28 โ€“ Steps for a Sink getting Source Battery capabilities Sequence
309 Figure 8-29 โ€“ Source Gets Sinkโ€™s Battery Capabilities
310 Table 8-29 โ€“ Steps for a Source getting Sink Battery capabilities Sequence
311 Figure 8-30 โ€“ Source Gets Sinkโ€™s Port Manufacturer Information
312 Table 8-30 โ€“ Steps for a Source getting Sinkโ€™s Port Manufacturer information Sequence
313 Figure 8-31 โ€“ Sink Gets Sourceโ€™s Port Manufacturer Information
314 Table 8-31 โ€“ Steps for a Source getting Sinkโ€™s Port Manufacturer information Sequence
315 Figure 8-32 โ€“ Source Gets Sinkโ€™s Battery Manufacturer Information
316 Table 8-32 โ€“ Steps for a Source gettingSinkโ€™s Battery Manufacturer information Sequence
317 Figure 8-33 โ€“ Sink Gets Sourceโ€™s Battery Manufacturer Information
318 Table 8-33 โ€“ Steps for a Source gettingSinkโ€™s Battery Manufacturer information Sequence
319 Figure 8-34 โ€“ VCONN Source Gets Cable Plugโ€™s Manufacturer Information
320 Table 8-34 โ€“ Steps for a Source getting Sinkโ€™s Port Manufacturer information Sequence
321 Figure 8-35 โ€“ Source requests security exchange with Sink
322 Table 8-35 โ€“ Steps for a Source requesting a security exchange with a Sink Sequence
323 Figure 8-36 โ€“ Sink requests security exchange with Source
324 Table 8-36 โ€“ Steps for a Sink requesting a security exchange with a Source Sequence
325 Figure 8-37 โ€“ Vconn Source requests security exchange with Cable Plug
326 Table 8-37 โ€“ Steps for a Vconn Source requestinga security exchange with a Cable Plug Sequence
327 Figure 8-38 โ€“ DFP to UFP Discover Identity
328 Table 8-38 โ€“ Steps for DFP to UFP Discover Identity
329 Figure 8-39 โ€“ Source Port to Cable Plug Discover Identity
330 Table 8-39 โ€“ Steps for Source Port to Cable Plug Discover Identity
331 Figure 8-40 โ€“ DFP to Cable Plug Discover Identity
332 Table 8-40 โ€“ Steps for DFP to Cable Plug Discover Identity
333 Figure 8-41 โ€“ DFP to UFP Enter Mode
334 Table 8-41 โ€“ Steps for DFP to UFP Enter Mode
335 Figure 8-42 โ€“ DFP to UFP Exit Mode
336 Table 8-42 โ€“ Steps for DFP to UFP Exit Mode
337 Figure 8-43 โ€“ DFP to Cable Plug Enter Mode
338 Table 8-43 โ€“ Steps for DFP to Cable Plug Enter Mode
339 Figure 8-44 โ€“ DFP to Cable Plug Exit Mode
340 Table 8-44 โ€“ Steps for DFP to Cable Plug Exit Mode
341 Figure 8-45 โ€“ UFP to DFP Attention
342 Table 8-45 โ€“ Steps for UFP to DFP Attention
343 Figure 8-46 โ€“ BIST Carrier Mode Test
344 8.3.3 State Diagrams
Table 8-46 โ€“ Steps for BIST Eye Pattern Test
345 Figure 8-47 โ€“ Outline of States
Figure 8-48 โ€“ References to states
Figure 8-49 โ€“ Example of state reference with conditions
346 Figure 8-50 โ€“ Example of state reference with the same entry and exit
348 Figure 8-51 โ€“ Source Port Policy Engine state diagram
354 Figure 8-52 โ€“ Sink Port state diagram
358 Figure 8-53 โ€“ Source Port Soft Reset and Protocol Error State Diagram
359 Figure 8-54 โ€“ Sink Port Soft Reset and Protocol Error Diagram
361 Figure 8-55 โ€“ Source Port Not Supported Message State Diagram
Figure 8-56 โ€“ Sink Port Not Supported Message State Diagram
362 Figure 8-57 โ€“ Source Port Ping State Diagram
363 Figure 8-58 โ€“ Source Port Source Alert State Diagram
Figure 8-59 โ€“ Sink Port Source Alert State Diagram
364 Figure 8-60 โ€“ Sink Port Get Source Capabilities Extended state diagram
Figure 8-61 โ€“ Source Give Source Capabilities Extended state diagram
365 Figure 8-62 โ€“ Sink Port Get Source Status state diagram
Figure 8-63 โ€“ Source Give Source Status state diagram
366 Figure 8-64 โ€“ Get Battery Capabilities state diagram8.3.3.10.1.1
Figure 8-65 โ€“ Give Battery Capabilities state diagram
367 Figure 8-66 โ€“ Get Battery Status state diagram
368 Figure 8-67 โ€“ Give Battery Status state diagram
Figure 8-68 โ€“ Get Manufacturer Information state diagram
369 Figure 8-69 โ€“ Give Manufacturer Information state diagram
Figure 8-70 โ€“ Send security request state diagram
370 Figure 8-71 โ€“ Send security response state diagram
Figure 8-72 โ€“ Security response received state diagram
371 Figure 8-73 โ€“ DFP to UFP Data Role Swap State Diagram
374 Figure 8-74 โ€“ UFP to DFP Data Role Swap State Diagram
376 Figure 8-75 โ€“ Dual-Role Port in Source to Sink Power Role Swap State Diagram
379 Figure 8-76 โ€“ Dual-role Port in Sink to Source Power Role Swap State Diagram
382 Figure 8-77 โ€“ Dual-Role Port in Source to Sink Fast Role Swap State Diagram
385 Figure 8-78 โ€“ Dual-role Port in Sink to Source Fast Role Swap State Diagram
387 Figure 8-79 โ€“ Dual-Role (Source) Get Source Capabilities diagram
Figure 8-80 โ€“ Dual-Role (Source) Give Sink Capabilities diagram
388 Figure 8-81 โ€“ Dual-Role (Sink) Get Sink Capabilities State Diagram
Figure 8-82 โ€“ Dual-Role (Sink) Give Source Capabilities State Diagram
389 Figure 8-83 โ€“ Dual-Role (Source) Get Source Capabilities Extended state diagram
390 Figure 8-84 โ€“ Dual-Role (Source) Give Sink Capabilities diagram
391 Figure 8-85 โ€“ VCONN Swap State Diagram
394 Figure 8-86 โ€“ Initiator to Port VDM Discover Identity State Diagram
395 Figure 8-87 โ€“ Initiator VDM Discover SVIDs State Diagram
396 Figure 8-88 โ€“ Initiator VDM Discover Modes State Diagram
397 Figure 8-89 โ€“ Initiator VDM Attention State Diagram
398 Figure 8-90 โ€“ Responder Structured VDM Discover Identity State Diagram
399 Figure 8-91 โ€“ Responder Structured VDM Discover SVIDs State Diagram
400 Figure 8-92 โ€“ Responder Structured VDM Discover Modes State Diagram
401 Figure 8-93 โ€“ Receiving a Structured VDM Attention State Diagram
402 Figure 8-94 โ€“ DFP VDM Mode Entry State Diagram
403 Figure 8-95 โ€“ DFP VDM Mode Exit State Diagram
404 Figure 8-96 โ€“ UFP Structured VDM Enter Mode State Diagram
405 Figure 8-97 โ€“ UFP Structured VDM Exit Mode State Diagram
406 Figure 8-98 โ€“ Cable Ready VDM State Diagram
407 Figure 8-99 โ€“ Cable Plug Soft Reset State Diagram
408 Figure 8-100 โ€“ Cable Plug Hard Reset State Diagram
Figure 8-101 โ€“ DFP Soft Reset or Cable Reset of a Cable Plug State Diagram
410 Figure 8-102 โ€“ UFP Source Soft Reset of a Cable Plug State Diagram
411 Figure 8-103 โ€“ Source Startup Structured VDM Discover Identity State Diagram
413 Figure 8-104 โ€“ Cable Plug Structured VDM Enter Mode State Diagram
414 Figure 8-105 โ€“ Cable Plug Structured VDM Exit Mode State Diagram
415 Figure 8-106 โ€“ BIST Carrier Mode State Diagram
417 Table 8-47 โ€“ Policy Engine States
421 9 States and Status Reporting
9.1 Overview
422 Figure 9-1 โ€“ Example PD Topology
423 9.1.1 PDUSB Device and Hub Requirements
9.1.2 Mapping to USB Device States
Figure 9-2 โ€“ Mapping of PD Topology to USB
424 Figure 9-3 โ€“ USB Attached to USB Powered State Transition
425 9.1.4 PDUSB Device Enumeration
Figure 9-4 โ€“ Any USB State to USB Attached State Transition(When operating as a Consumer)
Figure 9-5 โ€“ Any USB State to USB Attached State Transition(When operating as a Provider)
426 9.1.3 PD Software Stack
Figure 9-6 โ€“ Any USB State to USB Attached State Transition(After a USB Type-C Data Role Swap)
Figure 9-7 โ€“ Software stack on a PD aware OS
427 9.2 PD Class Specific Descriptors
Figure 9-8 โ€“ Enumeration of a PDUSB Device
Table 9-1 โ€“ USB Power Delivery Type Codes
428 9.2.1 USB Power Delivery Capability Descriptor
Table 9-2 โ€“ USB Power Delivery Capability Descriptor
430 9.2.2 Battery Info Capability Descriptor
9.2.3 PD Consumer Port Capability Descriptor
Table 9-3 โ€“ Battery Info Capability Descriptor
431 9.2.4 PD Provider Port Capability Descriptor
Table 9-4 โ€“ PD Consumer Port Descriptor
432 9.3 PD Class Specific Requests and Events
9.3.1 Class-specific Requests
Table 9-5 โ€“ PD Provider Port Descriptor
Table 9-6 โ€“ PD Class Requests
433 9.4 PDUSB Hub and PDUSB Peripheral Device Requests
9.4.1 GetBatteryStatus
Table 9-7 โ€“ PD Class Request Codes
Table 9-8 โ€“ PD Class Feature Selectors
434 Table 9-9 โ€“ Battery Status Structure
435 9.4.2 SetPDFeature
Table 9-10 โ€“ Battery Wake Mask
436 10 Power Rules
10.1 Introduction
10.2 Source Power Rules
10.2.1 Source Power Rule Considerations
Table 9-11 โ€“ Charging Policy Encoding
437 10.2.2 Normative Voltages and Currents
Table 10-1 โ€“ Considerations for Sources
Table 10-2 โ€“ Normative Voltages and Currents
438 Figure 10-1 โ€“ Source Power Rule Illustration
Figure 10-2 โ€“ Source Power Rule Example
439 Table 10-3 โ€“ Fixed Supply PDO โ€“ Source 5V
Table 10-4 โ€“ Fixed Supply PDO โ€“ Source 9V
Table 10-5 โ€“ Fixed Supply PDO โ€“ Source 15V
440 10.2.3 Optional Voltages/Currents
10.2.4 Power sharing between ports
10.3 Sink Power Rules
10.3.1 Sink Power Rule Considerations
10.3.2 Normative Sink Rules
Table 10-6 โ€“ Fixed Supply PDO โ€“ Source 20V
441 A. CRC calculation
A.1 C code example
442 A.2 Table showing the full calculation over one Message
B. PD Message Sequence Examples
443 B.1 External power is supplied downstream
Figure Bโ€“1 โ€“ External Power supplied downstream
444 Table Bโ€“1 โ€“ External power is supplied downstream
446 Figure B-2 โ€“ External Power supplied upstream
447 Table Bโ€“2 โ€“ External power is supplied downstream
451 B.3 Giving back power
Figure Bโ€“3 โ€“ Giving Back Power
452 Table Bโ€“3 โ€“ Giving back power
459 C. VDM Command Examples
C.1 Discover Identity Example
C.1.1 Discover Identity Command request
460 C.1.2 Discover Identity Command response โ€“ Active Cable
Table Cโ€“1 โ€“ Discover Identity Command request from Initiator Example
461 Table Cโ€“2 โ€“ Discover Identity Command responsefrom Active Cable Responder Example
462 C.1.3 Discover Identity Command response โ€“ Hub
Table Cโ€“3 โ€“ Discover Identity Command response from Hub Responder Example
463 C.2 Discover SVIDs Example
C.2.1 Discover SVIDs Command request
C.2.2 Discover SVIDs Command response
Table Cโ€“4 โ€“ Discover SVIDs Command request from Initiator Example
464 C.3 Discover Modes Example
C.3.1 Discover Modes Command request
Table Cโ€“5 โ€“ Discover SVIDs Command response from Responder Example
465 C.3.2 Discover Modes Command response
Table Cโ€“6 โ€“ Discover Modes Command request from Initiator Example
466 C.4 Enter Mode Example
C.4.1 Enter Mode Command request
Table Cโ€“7 โ€“ Discover Modes Command response from Responder Example
467 C.4.2 Enter Mode Command response
Table Cโ€“8 โ€“ Enter Mode Command request from Initiator Example
468 C.4.3 Enter Mode Command request with additional VDO
Table Cโ€“9 โ€“ Enter Mode Command response from Responder Example
469 C.5 Exit Mode Example
C.5.1 Exit Mode Command request
Table Cโ€“10 โ€“ Enter Mode Command request from Initiator Example
470 C.5.2 Exit Mode Command response
Table Cโ€“11 โ€“ Exit Mode Command request from Initiator Example
471 C.6 Attention Example
C.6.1 Attention Command request
Table Cโ€“12 โ€“ Exit Mode Command response from Responder Example
472 C.6.2 Attention Command request with additional VDO
Table Cโ€“13 โ€“ Attention Command request from Initiator Example
473 Table Cโ€“14 โ€“ Attention Command request from Initiator with additional VDO Example
BS EN 62680-1-2:2017
$215.11