BS EN IEC 60749-28:2022

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Semiconductor devices. Mechanical and climatic test methods – Electrostatic discharge (ESD) sensitivity testing. Charged device model (CDM). device level

Published By	Publication Date	Number of Pages
BSI	2022	54

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Categories: 31.080.01 - Semiconductor devices in general, BSI

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Description

IEC 60749-28:2022 is available as IEC 60749-28:2022 RLV which contains the International Standard and its Redline version, showing all changes of the technical content compared to the previous edition.IEC 60749-28:2022 establishes the procedure for testing, evaluating, and classifying devices and microcircuits according to their susceptibility (sensitivity) to damage or degradation by exposure to a defined field-induced charged device model (CDM) electrostatic discharge (ESD). All packaged semiconductor devices, thin film circuits, surface acoustic wave (SAW) devices, opto-electronic devices, hybrid integrated circuits (HICs), and multi-chip modules (MCMs) containing any of these devices are to be evaluated according to this document. To perform the tests, the devices are assembled into a package similar to that expected in the final application. This CDM document does not apply to socketed discharge model testers. This document describes the field-induced (FI) method. An alternative, the direct contact (DC) method, is described in Annex J. The purpose of this document is to establish a test method that will replicate CDM failures and provide reliable, repeatable CDM ESD test results from tester to tester, regardless of device type. Repeatable data will allow accurate classifications and comparisons of CDM ESD sensitivity levels. This edition includes the following significant technical changes with respect to the previous edition: – a new subclause and annex relating to the problems associated with CDM testing of integrated circuits and discrete semiconductors in very small packages; – changes to clarify cleaning of devices and testers.

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PDF Pages	PDF Title
2	undefined
4	European foreword Endorsement notice
5	English CONTENTS
9	FOREWORD
12	1 Scope 2 Normative references 3 Terms and definitions
13	4 Required equipment 4.1 CDM ESD tester 4.1.1 General
14	4.1.2 Current-sensing element 4.1.3 Ground plane 4.1.4 Field plate/field plate dielectric layer 4.1.5 Charging resistor Figures Figure 1 – Simplified CDM tester hardware schematic
15	4.2 Waveform measurement equipment 4.2.1 General 4.2.2 Cable assemblies 4.2.3 Equipment for high-bandwidth waveform measurement 4.2.4 Equipment for 1,0 GHz waveform measurement 4.3 Verification modules (metal discs) 4.4 Capacitance meter 4.5 Ohmmeter
16	5 Periodic tester qualification, waveform records, and waveform verification requirements 5.1 Overview of required CDM tester evaluations 5.2 Waveform capture hardware 5.3 Waveform capture setup 5.4 Waveform capture procedure
17	5.5 CDM tester qualification/requalification procedure 5.5.1 CDM tester qualification/requalification procedure 5.5.2 Conditions requiring CDM tester qualification/requalification 5.5.3 1 GHz oscilloscope correlation with high bandwidth oscilloscope
18	5.6 CDM tester quarterly and routine waveform verification procedure 5.6.1 Quarterly waveform verification procedure 5.6.2 Routine waveform verification procedure 5.7 Waveform characteristics
19	Tables Table 1 – CDM waveform characteristics for a 1 GHz bandwidth oscilloscope Table 2 – CDM waveform characteristics for a high-bandwidth (≥ 6 GHz) oscilloscope
20	5.8 Documentation 5.9 Procedure for evaluating full CDM tester charging of a device Figure 2 – CDM characteristic waveform and parameters
21	6 CDM ESD testing requirements and procedures 6.1 Tester and device preparation 6.2 Test requirements 6.2.1 Test temperature and humidity 6.2.2 Device test
22	6.3 Test procedures 6.4 CDM test recording / reporting guidelines 6.4.1 CDM test recording 6.4.2 CDM Reporting Guidelines 6.5 Testing of Devices in Small Packages
23	7 CDM classification criteria Table 3 – CDM ESDS device classification levels
24	Annexes Annex A (normative) Verification module (metal disc) specifications and cleaning guidelines for verification modules and testers A.1 Tester verification modules and field plate dielectric A.2 Care of verification modules Table A.1 – Specification for CDM tester verification modules (metal discs)
25	Annex B (normative) Capacitance measurement of verification modules (metal discs) sitting on a tester field plate dielectric
26	Annex C (normative) Testing of small package integrated circuits and discrete semiconductors (ICDS) C.1 Testing rationale C.2 Procedure for Determining Csmall
27	C.3 ICDS Technology requirements
28	Annex D (informative) CDM test hardware and metrology improvements
30	Annex E (informative) CDM tester electrical schematic Figure E.1 – Simplified CDM tester electrical schematic
31	Annex F (informative) Sample oscilloscope setup and waveform F.1 General F.2 Settings for the 1 GHz bandwidth oscilloscope F.3 Settings for the high-bandwidth oscilloscope F.4 Setup F.5 Sample waveforms from a 1 GHz oscilloscope
32	F.6 Sample waveforms from an 8 GHz oscilloscope Figure F.1 – 1 GHz TC 500, small verification module Figure F.2 – 1 GHz TC 500, large verification module
33	Figure F.3 – 8 GHz TC 500, small verification module (oscilloscope adjusts for attenuation) Figure F.4 – GHz TC 500, large verification module (oscilloscope adjusts for attenuation)
34	Annex G (informative) Field-induced CDM tester discharge procedures G.1 General G.2 Single discharge procedure G.3 Dual discharge procedure Figure G.1 – Single discharge procedure (field charging, ICDM Pulse, and slow discharge)
35	Figure G.2 – Dual discharge procedure (field charging, 1st ICDM pulse, no field, 2nd ICDM pulse)
36	Annex H (informative) Waveform verification procedures H.1 Factor/offset adjustment method
37	Figure H.1 – An example of a waveform verification flow for qualification and quarterly checks using the factor/offset adjustment method
38	Figure H.2 – An example of a waveform verification flow for the routine checks using the factor/offset adjustment method
39	H.2 Software voltage adjustment method Figure H.3 – Example of average Ipeak for the large verification module –high bandwidth oscilloscope
40	Figure H.4 – An example of a waveform verification flow for qualification and quarterly checks using the software voltage adjustment method
41	H.3 Example parameter recording tables Figure H.5 – An example of a waveform verification flow for the routine checks using the software voltage adjustment method
42	Table H.1 – Example waveform parameter recording table for the factor/offset adjustment method Table H.2 – Example waveform parameter recording table for the software voltage adjustment method
43	Annex I (informative) Determining the appropriate charge delay for full charging of a large module or device I.1 General I.2 Procedure for charge delay determination
44	Figure I.1 – An example characterization of charge delay vs. Ip
45	Annex J (informative) Electrostatic discharge (ESD) sensitivity testing direct contact charged device model (DC-CDM) J.1 General J.2 Standard test module J.3 Test equipment (CDM simulator) J.3.1 Test equipment design Table J.1 – Dimensions of the standard test modules
46	J.3.2 DUT (device under test) support J.3.3 Metal bar/board J.3.4 Equipment setup Figure J.1 – Examples of discharge circuit where the discharge is caused by closing the switch
47	J.4 Verification of test equipment J.4.1 General description of verification test equipment Figure J.2 – Verification test equipment for measuring the discharge current flowing to the metal bar/board from the standard test module Figure J.3 – Current waveform
48	J.4.2 Instruments for measurement J.4.3 Verification of test equipment, using a current probe Table J.2 – Specified current waveform Table J.3 – Range of peak current Ip1 for test equipment
49	J.5 Test procedure J.5.1 Initial measurement Figure J.4 – Measurement circuit for verification method using a current probe Table J.4 – Specification of peak current Ip1 for the current probe verification method
50	J.5.2 Tests J.5.3 Intermediate and final measurement J.6 Failure criteria J.7 Classification criteria J.8 Summary
52	Bibliography

Additional information

Status	Definitive
Pages	54
Publication Date	2022-09-06
ISBN	978 0 539 13657 9
Standard Number	BS EN IEC 60749-28:2022
Title	Semiconductor devices. Mechanical and climatic test methods – Electrostatic discharge (ESD) sensitivity testing. Charged device model (CDM). device level
Identical National Standard Of	EN 60749-28 Ed.2.0, IEC 60749-28 Ed.2.0
Replaces	BS EN 60749-28:2017
Descriptors	Electrostatics, Electric charge, Electronic equipment and components, Electric discharges, Mechanical testing, Semiconductor devices, Test methods, Environmental testing, Integrated circuits
Publisher	BSI
Committee	EPL/47
ICS Codes	31.080.01 - Semiconductor devices in general

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