IEEE 1481 2000

$137.58

IEEE Standard for Integrated Circuit (IC) Delay and Power Calculation System

Published By	Publication Date	Number of Pages
IEEE	2000	399

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Description

New IEEE Standard – Inactive – Superseded. Ways for integrated circuit designers to analyze chip timing and power consistently across a broad set of electric design automation (EDA) applications are covered in this standard. Methods by which integrated circuit vendors can express timing and power information once per given technology are also covered. In addition, this standard covers means by which EDA vendors can meet their application performance and capacity needs.

PDF Catalog

PDF Pages	PDF Title
1	Title Page
3	Introduction
4	Participants
6	CONTENTS
9	1. Overview 1.1 Scope
10	1.2 Purpose 1.3 Contents of this standard
11	2. References 3. Definitions
19	4. Acronyms and abbreviations
20	5. Delay and power calculation system architecture 5.1 Overview
22	5.2 Procedural interface
23	5.3 DPCM-application relationships
24	5.4 Interoperability 6. Delay calculation language (DCL)
25	6.1 Character set 6.2 Lexical elements
36	6.3 Name spaces of identifiers 6.4 Storage durations of objects 6.5 Scope of identifiers
37	6.6 Linkages of identifiers 6.7 DCL data types
40	6.8 Type conversions
41	6.9 Operators
46	6.10 Expressions
52	6.11 Computation order
54	6.12 DCL statements
65	6.13 Tables
77	6.14 Library control statements
82	6.15 Modeling
99	6.16 Embedded C code
100	6.17 Definition of a subrule
101	7. Power modeling and calculation
102	7.1 Power overview
103	7.2 Caching state information 7.3 Caching load and slew information
105	7.4 Simultaneous switching events 7.5 Partial swing events 7.6 Power calculation
107	7.7 Accumulation of power consumption by the design 7.8 Group pin list syntax and semantics
108	7.9 Group condition list syntax and semantics
109	7.10 Sensitivity list syntax and semantics
110	7.11 Group condition language
115	8. Procedural interface (PI) 8.1 Overview
116	8.2 Control and data flow 8.3 Architectural requirements 8.4 Data ownership technique
118	8.5 Application/DPCM interaction
120	8.6 Re-entry requirements 8.7 Application responsibilities when using a DPCM
122	8.8 Application use of the DPCM
125	8.9 DPCM library organization 8.10 DPCM error handling
126	8.11 C-level language for EXPOSE and EXTERNAL functions
129	8.12 PIN and BLOCK data structure requirements 8.13 DCM_STD_STRUCT standard structure
133	8.14 DCMTransmittedInfo structure 8.15 Environment or user variables 8.16 PI functions summary
143	8.17 PI function descriptions
238	8.18 Standard structure (dcmstd_stru.h) file
255	8.19 Standard macros (dcmstd_macs.h) file
258	8.20 Standard interface structures (dcmintf.h) file
263	8.21 Standard loading (dcmload.h) file
264	8.22 Standard debug (dcmdebug.h) file
280	8.23 Standard array (dcmgarray.h) file
284	8.24 DCM user array defines (dcmuarray.h) file
287	8.25 Standard platform-dependency (dcmpltfm.h) file
293	8.26 Standard state variables (dcmstate.h) file
295	8.27 Standard table descriptor (dcmutab.h)
296	9. Parasitics
297	9.1 Introduction 9.2 Targeted applications for SPEF 9.3 SPEF specification
324	9.4 Examples
341	10. Physical design exchange
342	10.1 Introduction
343	10.2 PDEF specification
381	10.3 Examples
389	Annex A—Implementation requirements
391	Annex B—Calculation of total load capacitance in the DPCS
394	Annex C—Hold control
399	Annex D—Bibliography