IEC 60749-28:2017(E) establishes the procedure for testing, evaluating, and classifying devices and microcircuits according to their susceptibility (sensitivity) to damage or degradation by exposure to a defined field-induced charged device model (CDM) electrostatic discharge (ESD). All packaged semiconductor devices, thin film circuits, surface acoustic wave (SAW) devices, opto-electronic devices, hybrid integrated circuits (HICs), and multi-chip modules (MCMs) containing any of these devices are to be evaluated according to this document. To perform the tests, the devices are assembled into a package similar to that expected in the final application. This CDM document does not apply to socketed discharge model testers. This document describes the field-induced (FI) method. An alternative, the direct contact (DC) method, is described in Annex I. The purpose of this document is to establish a test method that will replicate CDM failures and provide reliable, repeatable CDM ESD test results from tester to tester, regardless of device type. Repeatable data will allow accurate classifications and comparisons of CDM ESD sensitivity levels.<\/p>\n
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| 2<\/td>\n | National foreword <\/td>\n<\/tr>\n | ||||||
| 5<\/td>\n | CONTENTS <\/td>\n<\/tr>\n | ||||||
| 7<\/td>\n | Figures <\/td>\n<\/tr>\n | ||||||
| 8<\/td>\n | FOREWORD <\/td>\n<\/tr>\n | ||||||
| 11<\/td>\n | 1 Scope 2 Normative references 3 Terms and definitions <\/td>\n<\/tr>\n | ||||||
| 12<\/td>\n | 4 Required equipment 4.1 CDM ESD tester 4.1.1 General <\/td>\n<\/tr>\n | ||||||
| 13<\/td>\n | 4.1.2 Current-sensing element 4.1.3 Ground plane 4.1.4 Field plate\/field plate dielectric layer Figure\u00a01 \u2013 Simplified CDM tester hardware schematic <\/td>\n<\/tr>\n | ||||||
| 14<\/td>\n | 4.1.5 Charging resistor 4.2 Waveform measurement equipment 4.2.1 General 4.2.2 Cable assemblies 4.2.3 Equipment for high-bandwidth waveform measurement 4.2.4 Equipment for 1,0 GHz waveform measurement 4.3 Verification modules (metal discs) 4.4 Capacitance meter <\/td>\n<\/tr>\n | ||||||
| 15<\/td>\n | 4.5 Ohmmeter 5 Periodic tester qualification, waveform records, and waveform verification requirements 5.1 Overview of required CDM tester evaluations 5.2 Waveform capture hardware 5.3 Waveform capture setup 5.4 Waveform capture procedure <\/td>\n<\/tr>\n | ||||||
| 16<\/td>\n | 5.5 CDM tester qualification\/requalification procedure 5.5.1 CDM tester qualification\/requalification procedure 5.5.2 Conditions requiring CDM tester qualification\/requalification <\/td>\n<\/tr>\n | ||||||
| 17<\/td>\n | 5.5.3 1 GHz oscilloscope correlation with high bandwidth oscilloscope 5.6 CDM tester quarterly and routine waveform verification procedure 5.6.1 Quarterly waveform verification procedure 5.6.2 Routine waveform verification procedure 5.7 Waveform characteristics <\/td>\n<\/tr>\n | ||||||
| 18<\/td>\n | Tables Table\u00a01 \u2013 CDM waveform characteristics for a 1 GHz bandwidth oscilloscope Table\u00a02 \u2013 CDM waveform characteristics for a high-bandwidth (\u2265 6 GHz) oscilloscope <\/td>\n<\/tr>\n | ||||||
| 19<\/td>\n | 5.8 Documentation 5.9 Procedure for evaluating full CDM tester charging of a device Figure 2 \u2013 CDM characteristic waveform and parameters <\/td>\n<\/tr>\n | ||||||
| 20<\/td>\n | 6 CDM ESD testing requirements and procedures 6.1 Device handling 6.2 Test requirements 6.2.1 Test temperature and humidity 6.2.2 Device test 6.3 Test procedures <\/td>\n<\/tr>\n | ||||||
| 21<\/td>\n | 6.4 CDM test recording \/ reporting guidelines 7 CDM classification criteria Table\u00a03 \u2013 CDM ESDS device classification levels <\/td>\n<\/tr>\n | ||||||
| 22<\/td>\n | Annex\u00a0A (normative)Verification module (metal disc) specifications and cleaning guidelinesfor verification modules and testers A.1 Tester verification modules and field plate dielectric A.2 Care of verification modules Table\u00a0A.1 \u2013 Specification for CDM tester verification modules (metal discs) <\/td>\n<\/tr>\n | ||||||
| 23<\/td>\n | Annex\u00a0B (normative)Capacitance measurement of verification modules (metal discs)sitting on a tester field plate dielectric <\/td>\n<\/tr>\n | ||||||
| 24<\/td>\n | Annex\u00a0C (informative)CDM test hardware and metrology improvements <\/td>\n<\/tr>\n | ||||||
| 26<\/td>\n | Annex\u00a0D (informative)CDM tester electrical schematic Figure D.1 \u2013 Simplified CDM tester electrical schematic <\/td>\n<\/tr>\n | ||||||
| 27<\/td>\n | Annex\u00a0E (informative)Sample oscilloscope setup and waveform E.1 General E.2 Settings for the 1 GHz bandwidth oscilloscope E.3 Settings for the high-bandwidth oscilloscope E.4 Setup E.5 Sample waveforms from a 1 GHz oscilloscope <\/td>\n<\/tr>\n | ||||||
| 28<\/td>\n | E.6 Sample waveforms from an 8 GHz oscilloscope Figure E.1 \u2013 1 GHz TC 500, small verification module Figure E.2 \u2013 1 GHz TC 500, large verification module <\/td>\n<\/tr>\n | ||||||
| 29<\/td>\n | Figure E.3 \u2013 8 GHz TC 500, small verification module (oscilloscope adjusts for attenuation) Figure E.4 \u2013 GHz TC 500, large verification module(oscilloscope adjusts for attenuation) <\/td>\n<\/tr>\n | ||||||
| 30<\/td>\n | Annex\u00a0F (informative)Field-induced CDM tester discharge procedures F.1 General F.2 Single discharge procedure F.3 Dual discharge procedure Figure F.1 \u2013 Single discharge procedure (field charging, ICDM Pulse, and slow discharge) <\/td>\n<\/tr>\n | ||||||
| 31<\/td>\n | Figure F.2 \u2013 Dual discharge procedure (field charging, 1st ICDM pulse, no field, 2nd ICDM pulse) <\/td>\n<\/tr>\n | ||||||
| 32<\/td>\n | Annex\u00a0G (informative)Waveform verification procedures G.1 Factor\/offset adjustment method <\/td>\n<\/tr>\n | ||||||
| 33<\/td>\n | Figure G.1 \u2013 An example of a waveform verification flow for qualification and quarterly checks using the factor\/offset adjustment method <\/td>\n<\/tr>\n | ||||||
| 34<\/td>\n | Figure G.2 \u2013 An example of a waveform verification flow for the routine checksusing the factor\/offset adjustment method <\/td>\n<\/tr>\n | ||||||
| 35<\/td>\n | G.2 Software voltage adjustment method Figure G.3 \u2013 Example of average Ipeak for the large verification module \u2013 high bandwidth oscilloscope <\/td>\n<\/tr>\n | ||||||
| 36<\/td>\n | Figure G.4 \u2013 An example of a waveform verification flow for qualification and quarterly checks using the software voltage adjustment method <\/td>\n<\/tr>\n | ||||||
| 37<\/td>\n | G.3 Example parameter recording tables Figure G.5 \u2013 An example of a waveform verification flow for the routinechecks using the software voltage adjustment method <\/td>\n<\/tr>\n | ||||||
| 38<\/td>\n | Table\u00a0G.1 \u2013 Example waveform parameter recording table for the factor\/offset adjustment method Table\u00a0G.2 \u2013 Example waveform parameter recording table for the software voltage adjustment method <\/td>\n<\/tr>\n | ||||||
| 39<\/td>\n | Annex\u00a0H (informative)Determining the appropriate charge delay for full charging of a large module or device H.1 General H.2 Procedure for charge delay determination <\/td>\n<\/tr>\n | ||||||
| 40<\/td>\n | Figure H.1 \u2013 An example characterization of charge delay vs. Ip <\/td>\n<\/tr>\n | ||||||
| 41<\/td>\n | Annex\u00a0I (informative)Electrostatic discharge (ESD) sensitivity testing directcontact charged device model (DC-CDM) I.1 General I.2 Standard test module I.3 Test equipment (CDM simulator) I.3.1 Test equipment design I.3.2 DUT (device under test) support Table\u00a0I.1 \u2013 Dimensions of the standard test modules <\/td>\n<\/tr>\n | ||||||
| 42<\/td>\n | I.3.3 Metal bar\/board I.3.4 Equipment setup I.4 Verification of test equipment I.4.1 General description of verification test equipment Figure I.1 \u2013 Examples of discharge circuit wherethe discharge is caused by closing the switch <\/td>\n<\/tr>\n | ||||||
| 43<\/td>\n | Figure I.2 \u2013 Verification test equipment for measuring the discharge current flowingto the metal bar\/board from the standard test module Figure\u00a0I.3 \u2013 Current waveform Table\u00a0I.2 \u2013 Specified current waveform <\/td>\n<\/tr>\n | ||||||
| 44<\/td>\n | I.4.2 Instruments for measurement I.4.3 Verification of test equipment, using a current probe Figure I.4 \u2013 Measurement circuit for verification method using a current probe Table\u00a0I.3 \u2013 Range of peak current Ip1 for test equipment <\/td>\n<\/tr>\n | ||||||
| 45<\/td>\n | I.5 Test procedure I.5.1 Initial measurement I.5.2 Tests Table\u00a0I.4 \u2013 Specification of peak current Ip1 for the current probe verification method <\/td>\n<\/tr>\n | ||||||
| 46<\/td>\n | I.5.3 Intermediate and final measurement I.6 Failure criteria I.7 Classification criteria I.8 Summary <\/td>\n<\/tr>\n | ||||||
| 47<\/td>\n | Bibliography <\/td>\n<\/tr>\n<\/table>\n","protected":false},"excerpt":{"rendered":" Semiconductor devices. Mechanical and climatic test methods – Electrostatic discharge (ESD) sensitivity testing. Charged device model (CDM). Device level<\/b><\/p>\n |