| PDF Pages<\/th>\n | PDF Title<\/th>\n<\/tr>\n | ||||||
|---|---|---|---|---|---|---|---|
| 2<\/td>\n | undefined <\/td>\n<\/tr>\n | ||||||
| 5<\/td>\n | Annex ZA (normative)Normative references to international publicationswith their corresponding European publications <\/td>\n<\/tr>\n | ||||||
| 6<\/td>\n | English CONTENTS <\/td>\n<\/tr>\n | ||||||
| 8<\/td>\n | FOREWORD <\/td>\n<\/tr>\n | ||||||
| 10<\/td>\n | 1 Scope 2 Normative references <\/td>\n<\/tr>\n | ||||||
| 11<\/td>\n | 3 Terms, definitions and abbreviated terms 3.1 Terms and definitions 3.2 Abbreviated terms 4 General <\/td>\n<\/tr>\n | ||||||
| 12<\/td>\n | 5 Test apparatus 5.1 Die bonding equipment 5.2 Temperature cycling chamber 5.3 Thermal resistance measuring equipment 5.4 Ultrasonic flaw inspection equipment 6 Specimen 6.1 General Figures Figure 1 \u2013 Regions for evaluation for discrete type power electronic device <\/td>\n<\/tr>\n | ||||||
| 13<\/td>\n | 6.2 Preparation of specimen 7 Evaluation test 7.1 Test method 7.1.1 General 7.1.2 Temperature cycling test Figure 2 \u2013 Temperature cycling test <\/td>\n<\/tr>\n | ||||||
| 14<\/td>\n | 7.1.3 Test conditions 7.1.4 End of test criteria 7.2 Inspection and measurement 7.2.1 Visual inspection 7.2.2 Thermal resistance measurement Tables Table 1 \u2013 Temperature cycling test conditions <\/td>\n<\/tr>\n | ||||||
| 15<\/td>\n | 7.2.3 Ultrasonic flaw inspection 7.3 Test procedure 7.3.1 Test preparation 7.3.2 Preconditioning 7.3.3 Initial measurement 7.3.4 Test 7.3.5 Intermediate measurement 7.3.6 Post-test treatment 7.3.7 Final judgment <\/td>\n<\/tr>\n | ||||||
| 16<\/td>\n | 8 Failure cycle 9 Items to be specified in the product specification <\/td>\n<\/tr>\n | ||||||
| 17<\/td>\n | Annex A (normative)Thermal resistance measuring method at die attach region A.1 Thermal resistance measuring method A.1.1 General A.1.2 Temperature characteristics measurement for TEG chip Figure A.1 \u2013 Example of the structure of the specimen using a TEG chip <\/td>\n<\/tr>\n | ||||||
| 18<\/td>\n | A.1.3 Thermal resistance measurement method for TEG chip Figure A.2 \u2013 Example of temperature characteristics \u2013 TEG chip <\/td>\n<\/tr>\n | ||||||
| 19<\/td>\n | A.2 Correction of thermal resistance criteria Figure A.3 \u2013 Example of structure for thermal resistance measurementfor a power electronic device <\/td>\n<\/tr>\n | ||||||
| 20<\/td>\n | Figure A.4 \u2013 Example of relationship between thermal resistance and die attach damage Table A.1 \u2013 Example of thermal resistance value (Rth) result <\/td>\n<\/tr>\n | ||||||
| 21<\/td>\n | Figure A.5 \u2013 Example of ultrasonic flaw inspection result <\/td>\n<\/tr>\n | ||||||
| 22<\/td>\n | Annex B (informative)Discrete type specimen preparation using a heating resistor TEG chip B.1 Power electronic device specimen B.1.1 General B.1.2 Power electronic device chip B.1.3 Base substrate Figure B.1 \u2013 Example of TEG chip <\/td>\n<\/tr>\n | ||||||
| 23<\/td>\n | B.1.4 Package mould B.1.5 Surface treatment B.2 Die attach materials B.3 Specimen preparation <\/td>\n<\/tr>\n | ||||||
| 24<\/td>\n | Figure B.2 \u2013 Typical reflow soldering profile for Sn96,5Ag3Cu,5 solder alloy <\/td>\n<\/tr>\n | ||||||
| 25<\/td>\n | Figure B.3 \u2013 Example of specimen \u2013 TEG chip <\/td>\n<\/tr>\n | ||||||
| 26<\/td>\n | Annex C (informative)Reliability performance index for die attach joint \u2013Discrete type power electronic device Table C.1 \u2013 Reliability performance index for die attach joint \u2013Discrete type power electronic device <\/td>\n<\/tr>\n | ||||||
| 27<\/td>\n | Bibliography <\/td>\n<\/tr>\n<\/table>\n","protected":false},"excerpt":{"rendered":" Endurance test methods for die attach materials – Temperature cycling test method for die attach materials applied to discrete type power electronic devices<\/b><\/p>\n |